Solución de chip de filtro sintonizable compatible con SDR de banda ancha

No.

Parameter

Symbol

Unit

Specification (-40℃～+85℃)

01

Frequency Range

F

MHz

108-174MHz；225-512MHz

02

Insertion Loss

I.L

dB

≤7.5，Bypass Insertion Loss≤1

03

-1dB Bandwidth

BW-1

MHz

≥4

04

Out-of-Band Rejection

Sel.

dBc

F0±5%≥25；F0±10%≥50

05

RF Input power

P(-1dB)

dBm

≤35

06

Tuning Time

Tv

us

≤5

07

VSWR

VSWR

≤1.5

08

Impedance(In/Out)

Zin/Zout

Ω

50

09

Supply Voltage

Vs

V

+3.3V~+12V

10

Power Consumption

P

mw

≤50

11

Center Frequency Drift

F0 Drift

ppm/℃

≤80ppm/℃

12

Operating Temperature

To

℃

-40～+85

13

Storage Temperature

Ts

℃

-55～+105

14

Weight

W

g

≤30

15

Dimensions

mm

50.8*25.4*6（±0.2）

Descriptions

Address Code Definition:
10-bit parallel binary code A0–A9, compatible with CMOS and TTL logic levels.

· A0–A7 control voltage levels: Logic Low: 0 ~ 0.7 V; Logic High: 2.4 ~ 3.3 V .

· A0–A7 are used as the in-band address code.

· A8 and A9 are used as band selection codes.

Address Calculation (rounded to integer)

Address Code={(fx-flow）/(fhigh-flow)}*250 

Where:

·  fx: desired intra-segment center frequency

·  flow: lowest frequency in the segment

·  fhigh: highest frequency in the segment

·  250: intra-segment steps

If the calculated result contains a decimal fraction, it shall be rounded to the nearest integer.

A8

A9

Frequency Band

0

0

108~ 174MHz

1

0

225~ 512MHz

0

1

Bypass